28.1.4 Deadman Timer Status Register
Note:
- BAD1, BAD2 and DMTEVENT bits are cleared only on a reset.
| Name: | DMTSTAT |
| Offset: | 0x068 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BAD1 | BAD2 | DMTEVENT | WINOPN | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 7 – BAD1 Deadman Timer Bad STEP1[7:0] Value Detect bit(1)
| Value | Description |
|---|---|
| 1 | Incorrect STEP1[7:0] value was detected |
| 0 | Incorrect STEP1[7:0] value was not detected |
Bit 6 – BAD2 Deadman Timer Bad STEP2[7:0] Value Detect bit(1)
| Value | Description |
|---|---|
| 1 | Incorrect STEP2[7:0] value was detected |
| 0 | Incorrect STEP2[7:0] value was not detected |
Bit 5 – DMTEVENT Deadman Timer Event bit(1)
| Value | Description |
|---|---|
| 1 | Deadman Timer event was detected (counter expired, or bad STEP1[7:0] or STEP2[7:0] value was entered prior to counter increment) |
| 0 | Deadman Timer event was not detected |
Bit 0 – WINOPN Deadman Timer Clear Window bit
| Value | Description |
|---|---|
| 1 | Deadman Timer clear window is open |
| 0 | Deadman Timer clear window is not open |