3.10.7.2.1.2 T1CNT – Timer1 Counter Register
| Name: | T1CNT |
| Offset: | 0x06F |
| Reset: | 0x00 |
The counter
register (T1CNT) contains an 8-bit counter value. It is only read when Timer1 is
disabled (T1ENA = 0). Reading the register during operation may lead to
corrupted values since the timer can run on asynchronous
clocks.
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| T1CNT[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |