13.4.18 ADC Digital Comparator x Channel Enable Register High (x = 0, 1, 2, 3)(1)
Note:
- Bit availability is dependent on the number of supported ADC channels. Refer to dsPIC33CK512MP608 Product Families for ADC channel availability on package variants.
| Name: | ADCMPxENH |
| Offset: | 0xB3A, 0xB42, 0xB4A, 0xB52 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CMPEN[27:24] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMPEN[23:16] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 11:0 – CMPEN[27:16] Comparator Enable for Corresponding Input Channel bits
| Value | Description |
|---|---|
1 |
Conversion result for corresponding channel is used by the comparator |
0 |
Conversion result for corresponding channel is not used by the comparator |