5.4.1 Configuration Protection Control

Name: CFGPRTCTL
Address: 0x000F

Bit 15141312111098 
 KEY2KEY1 
Access RORORORORORORORO 
Reset 00----00 
Bit 76543210 
 WREN 
Access RORORORORORORO 
Reset 00000001 

Bit 15 – KEY2 Key #2 Accepted

This bit is set when Key #2 (535Ah) has been successfully written to this register after Key #1.
Note: This bit is cleared on write to any other bit field in this register.
ValueDescription
0 Key #2 has not been successfully written after Key #1
1 Key #2 has been successfully written after Key #1

Bit 14 – KEY1 Key #1 Accepted

This bit is set when Key #1 (5341h) has been successfully written to this register.
Note: This bit is cleared on write of any other value is to this register, except Key #2.
ValueDescription
0 Key #1 has not been successfully written
1 Key #1 has been successfully written

Bit 0 – WREN Configuration Write Enable

When this bit is clear, writes to register bit fields are disabled to protect against accidental configuration changes. Writable bit fields may be written when this bit is set.
Note: This bit may only be written once both Key #1 and Key #2 have been successfully written in the correct sequence and fields KEY1 and KEY2 are both set.
Note: Writes to Clause 22 MMD Control (MMDCTRL) and MMD Address/Data (MMDAD) registers are not blocked when this bit is clear as they are needed to write to this CFGPRTCTL register.
ValueDescription
0 Writes to register bit fields disabled (Protected mode)
1 Writes to register bit fields enabled (Normal operation)