5.4.44 Sleep Control 0 Register
| Name: | SLPCTL0 |
| Address: | 0x0080 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SLPEN | WKINEN | MDIWKEN | SLPINHDLY[1:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SLPCAL[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 15 – SLPEN Sleep Enable
| Value | Description |
|---|---|
0 |
Normal operation |
1 |
Sleep |
Bit 14 – WKINEN WAKE_IN Wake-up Enable
| Value | Description |
|---|---|
0 |
Disable wake-up by input pulse on WAKE_IN |
1 |
Enable wake-up by input pulse on WAKE_IN |
Bit 13 – MDIWKEN MDI Wake-up Enable
| Value | Description |
|---|---|
0 |
Disable wake-up from MDI activity detection |
1 |
Enable wake-up from MDI activity detection |
Bits 12:11 – SLPINHDLY[1:0] Sleep Inhibit Delay
| Value | Description |
|---|---|
00 |
0 ms delay |
01 |
50 ms delay |
10 |
100 ms delay |
11 |
200 ms delay |
Bits 6:3 – SLPCAL[3:0] Sleep Calibration
| Value | Description |
|---|---|
0000 |
Only valid value for write |
| Others |
Invalid on write. Ignore on read. |