5.4.45 Sleep Control 1 Register
| Name: | SLPCTL1 |
| Address: | 0x0081 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | RO | RO | RO | RO | RO | RO | RO | RO | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WOPOL | WIPOL | MWKFWD | WKOFWDEN | MDIFWDEN | |||||
| Access | R/W | R/W | R/W | RO | R/W | R/W SC | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – WOPOL WAKE_OUT Polarity
This bit configures the polarity of the 90 μs output wake pulse generated on the WAKE_OUT pin.
Note: Only wake from HIGH pulses on WAKE_OUT is
supported.
Restriction: While this bit defaults to ‘0’, it
must always be written to ‘1’ when writing to other bits in this register.
| Value | Description |
|---|---|
0 |
Reserved |
1 |
Device will output an active HIGH pulse on the WAKE_OUT pin. |
Bit 5 – WIPOL WAKE_IN Polarity
This bit configures the polarity of the pulse on the WAKE_IN pin that will wake the device from sleep.
| Value | Description |
|---|---|
0 |
Device will wake from an active LOW pulse on WAKE_IN pin. |
1 |
Device will wake from an active HIGH pulse on WAKE_IN pin. |
Bit 2 – MWKFWD Manual Wake Forward
Note: This bit is self-cleared by hardware
once the wake output events have completed.
| Value | Description |
|---|---|
0 |
No wake out signaling (normal operation) |
1 |
Generate wake out signaling to WAKE_OUT and/or MDI |
Bit 1 – WKOFWDEN WAKE_OUT Forward Enable
| Value | Description |
|---|---|
0 |
Disable generation of a pulse on WAKE_OUT on wake-up |
1 |
Enable generation of a pulse on WAKE_OUT on wake-up |
Bit 0 – MDIFWDEN MDI Forward Enable
| Value | Description |
|---|---|
0 |
Disable generation MDI wake signaling upon wake-up from WAKE_IN |
1 |
Enable generation MDI wake signaling upon wake-up from WAKE_IN |