5.4.21 Transmit Match Control Register
Name: | TXMCTL |
Address: | 0x0040 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | RO | RO | RO | RO | RO | RO | RO | RO | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
TXPMDET | MACTXTSE | TXME | |||||||
Access | RC | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – TXPMDET Transmit Packet Match Detected
Value | Description |
---|---|
0 |
A matching packet has not been transmitted |
1 |
A matching packet has been transmitted |
Bit 2 – MACTXTSE MAC Transmit Time Stamp Enable
Note: This bit
cannot be enabled at the same time as the TXME bit.
Value | Description |
---|---|
0 |
Transmit MAC gPTP disabled. Normal operation. |
1 |
Transmit MAC gPTP enabled. Matching transmit packets will delay transmission until the next PLCA transmit opportunity. |
Bit 1 – TXME Transmit Match Enable
Note: This bit cannot be
enabled at the same time as the MACTXTSE
bit.
Value | Description |
---|---|
0 |
Transmitted packets are not compared. Normal operation. |
1 |
Transmitted packets will be compared and TXPI asserted on a match. |