43.16 External XTAL and Clock AC Electrical Specifications

Table 43-17. External XTAL and Clock AC Electrical Specifications
AC Characteristics Standard Operating Conditions: VDDIO = VDDANA 1.9V to 3.6V (unless otherwise stated) Operating Temperature: -40°C ≤ TA ≤ +85°C for Industrial Temp

-40°C ≤ TA ≤ +125°C for Extended Temp
Param. No. Symbol Characteristics Min. Typ. Max. Units Conditions(1)
XOSC_1 FOSC_XOSC XOSC crystal frequency — 16 — MHz XIN, XOUT primary oscillator
XOSC_1A TOSC TOSC = 1/FOSC_XOSC — 0.0625 — μs See parameter XOSC1 for FOSC_XOSC value
XOSC_2 XOSC_ST(2) XOSC crystal start-up time — 1.25 2.5 ms Crystal stabilization time only not oscillator ready
XOSC_3 CXIN XOSC XIN parasitic pin capacitance — 0.35 — pF With default crystal trim settings
XOSC_5 CXOUT XOSC XOUT parasitic pin capacitance — 0.35 — pF With default crystal trim settings
XOSC_11 CLOAD(3) XOSC crystal FOSC = 16 MHz — 9 — pF —
XOSC_21 ESR XOSC crystal FOSC = 16 MHz — — 100 Ω —
XOSC_33 DLEVEL MCU crystal oscillator power drive level — — 100 μW —
Note:
  1. VDDIO = VDDANA = 3.3V.
  2. This is for guidance only. A major component of crystal start-up time is based on the second party crystal MFG parasitic that are outside the scope of this specification.
  3. The test conditions for crystal load capacitor calculation are as follows:
    • Standard PCB trace capacitance = 1.5 pF per 12.5 mm (0.5 inches) (in other words, PCB STD TRACE W = 0.175 mm, H = 36 μm, T = 113 μm).
    • Xtal PCB capacitance typical; therefore, ~= 2.5 pF for a tight PCB xtal layout.
    • For CXIN and CXOUT within 4 pF of each other, assume CXTAL_EFF = ((CXIN+CXOUT) / 2).
    • Note: Averaging CXIN and CXOUT will affect the final calculated CLOAD value by less than 0.25 pF.
    Equation 43-1. Equation 1:
    M F G       C L O A D ⁢     S p e c   =   { ( [ C X I N ⁢   +     C 1 ]     *     [ C X O U T ⁢       +     C 2 ] ) / [ C X I N ⁢   +     C 1 ⁢   + C 2 ⁢   + C X O U T ] }     +   e s t i m a t e d ⁢   o s c i l l a t o r ⁢   P C B ⁢   s t r a y ⁢   c a p a c i ⁢ t a n c e ⁢

    Assuming C1 = C2 and CXin ~= CXout, the formula can be further simplified and restated to solve for C1 and C2 by:

    Equation 43-2. Equation 2 (In other words: Simplified Equation 1)
    C 1 ⁢     =       C 2 ⁢     =     ( ( 2 ⁢   *     M F G       C L O A D ⁢     S p e c )     − C X T A L _ E F F ⁢   −     ( 2 ⁢   *     ⁢   P C B ⁢       ⁢   c a p a c i ⁢ t a n c e ) ) ⁢

    Example:

    • XTAL Mfg CLOAD Data Sheet Spec = 12 pF
    • PCB XTAL trace Capacitance = 2.5 pF
    • CXIN pin = 6.5 pF, CXOUT pin = 4.5 pF; therefore, CXTAL_EFF = ((CXIN+CXOUT) / 2)

    CXTAL_EFF = ((6.5 + 4.5)/2) = 5.5 pF

    C1 = C2 = ((2 * MFG Cload spec) - CXTAL_EFF - (2 * PCB capacitance))

    C1 = C2 = (24 - 5.5 - (2 * 2.5))

    C1 = C2 = 13.5 pF (Always rounded down)

    C1 = C2 = 13 pF (in other words, for hypothetical example crystal external load capacitors)

    User C1 = C2 = 13 pF CLOAD (max) spec

  4. Maximum start-up time user selectable in XOSCCTRL.STARTUP.
  5. These parameters are characterized but not tested in manufacturing.
Figure 43-12. External XTAL and Clock Diagram