7.11.37 Change Notice Enable for PortC

This register contains the CN interrupt enable control bits for each of the input pins. Setting any of these bits enables a CN interrupt for the corresponding pins. When CNSTYLE is set, CNENC controls the positive edge. CNENC enables a mismatch CN interrupt condition when CNSTYLE is not set
Name: CNENC
Offset: 0x280
Reset: 0x0
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
     CNENCxCNENCxCNENCxCNENCx 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 76543210 
 CNENCx     CNENCxCNENCx 
Access R/WR/WR/W 
Reset 000 

Bits 0,1,7,8,9,10,11 – CNENCx (x = 0, 1, 7, 8, 9, 10, 11; x = 0 for bit0 mapped to PC0, … x = 11 for bit11 mapped to PC11) Change Notice Enable for PortC

ValueDescription
1Enables a mismatch/positive edge CN interrupt condition associated with an I/O pin.
0Disables a mismatch/positive edge CN interrupt condition associated with an I/O pin.