7.11.65 Change Notice Enable for PortE

This register contains the CN interrupt enable control bits for each of the input pins. Setting any of these bits enables a CN interrupt for the corresponding pins. When CNSTYLE is set, CNENE controls the positive edge. CNENE enables a mismatch CN interrupt condition when CNSTYLE is not set

Name:	CNENE
Offset:	0x480
Reset:	0x0
Property:	-


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
		CNENEx	CNENEx	CNENEx	CNENEx	CNENEx	CNENEx	CNENEx
Access		R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset		0	0	0	0	0	0	0

Bits 0,1,2,3,4,5,6 – CNENEx (x = 0 to 6; x = 0 for bit0 mapped to PE0, … x = 6 for bit6 mapped to PE6) Change Notice Enable for PortE

Value	Description
1	Enables a mismatch/positive edge CN interrupt condition associated with an I/O pin.
0	Disables a mismatch/positive edge CN interrupt condition associated with an I/O pin.