7.11.42 Slew Rate Control 1 for
PortC
This register configures the
slew rate control bits associated with Port C.Note: To configure the
slew rate, the user must also configure the SRCON0C register associated with Port C. See
Slew Rate Control Bit Settings table in the Slew Rate Control from Related
Links.
Name: | SRCON1C |
Offset: | 0x2D0 |
Reset: | 0x0 |
Property: | - |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | | | | | | | | |
Access | | | | | | | | | |
Reset | | | | | | | | | |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| | | | | | | | | |
Access | | | | | | | | | |
Reset | | | | | | | | | |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| | | | | | | SR1Cx | | |
Access | | | | | | | R/W | | |
Reset | | | | | | | 0 | | |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | | | | SR1Cx | SR1Cx | |
Access | | | | | | | R/W | R/W | |
Reset | | | | | | | 0 | 0 | |
Bits 0,1,9 – SR1Cx (x = 0, 1, 9; x = 0 for
bit0 mapped to PC0, … x = 9 for bit9 mapped to PC9) Slew Rate Control 1 for
PortC