7.11.55 Slew Rate Control 0 for PortD

This register configures the slew rate control bits associated with PortD.
Note: To configure the slew rate, the user must also configure the SRCON1D register associated with PortD. See Slew Rate Control Bit Settings table in the Slew Rate Control from Related Links.
Name: SRCON0D
Offset: 0x3C0
Reset: 0x0
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
       SR0DxSR0Dx 
Access R/WR/W 
Reset 00 

Bits 0,1 – SR0Dx (x = 0, 1; x = 0 for bit0 mapped to PC0, … x = 1 for bit1 mapped to PC1) Slew Rate Control 0 for PortD