7.11.39 Change Notice Enable for PortC

This register contains the CN interrupt enable control bits for each of the input pins. Setting any of these bits enables a CN interrupt for the corresponding pins. When CNSTYLE is set, CNNEC controls the negative edge.

Name:	CNNEC
Offset:	0x2A0
Reset:	0x0
Property:	-


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
					CNNECx	CNNECx	CNNECx	CNNECx
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CNNECx						CNNECx	CNNECx
Access	R/W						R/W	R/W
Reset	0						0	0

Bits 0,1,7,8,9,10,11 – CNNECx (x = 0, 1, 7, 8, 9, 10, 11; x = 0 for bit0 mapped to PC0, … x = 11 for bit11 mapped to PC11) Change Notice Enable for PortC

Value	Description
1	Enables a mismatch/negative edge CN interrupt condition associated with an I/O pin.
0	Disables a mismatch/negative edge CN interrupt condition associated with an I/O pin.