This register configures the
slew rate control bits associated with Port C.
Note: To configure the
slew rate, the user must also configure the SRCON1C register associated with PortC. See
Slew Rate Control Bit Settings table in the Slew Rate Control from Related
Links.
Name:
SRCON0C
Offset:
0x2C0
Reset:
0x0
Property:
-
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
SR0Cx
Access
R/W
Reset
0
Bit
7
6
5
4
3
2
1
0
SR0Cx
SR0Cx
Access
R/W
R/W
Reset
0
0
Bits 0,1,9 – SR0Cx (x = 0, 1, 9; x = 0 for
bit0 mapped to PC0, … x = 9 for bit9 mapped to PC9) Slew Rate Control 0 for
PortC
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.