7.11.7 Pull-down Control Register Configuration for PortA
Note: If configuring the port pin as a digital output, the user must always disable this register.
| Name: | CNPDA |
| Offset: | 0x60 |
| Reset: | 0x0 |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CNPDAx | CNPDAx | CNPDAx | CNPDAx | CNPDAx | CNPDAx | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CNPDAx | CNPDAx | CNPDAx | CNPDAx | CNPDAx | CNPDAx | CNPDAx | CNPDAx | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 0,1,2,3,4,5,6,7,8,9,10,13,14,15 – CNPDAx (x = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 13, 14, 15; x = 0 for bit0 mapped to PA0, … x = 10 for bit 10, x = 13 for bit13, … x = 15 for bit 15 mapped to PA15) Pull-down configuration for PortA
| Value | Description |
|---|---|
| 1 | Enables the weak pull-down associated with an I/O pin. |
| 0 | Disables the weak pull-down associated with an I/O pin. |