This register configures the
slew rate control bits associated with Port B.
Note: To configure the slew rate,
the user must also configure the SRCON1B register
associated with PortB. See Slew Rate Control Bit
Settings table in the Slew Rate Control
from Related Links.
Name:
SRCON0B
Offset:
0x1C0
Reset:
0x0
Property:
-
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
SR0Bx
SR0Bx
SR0Bx
SR0Bx
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bit
7
6
5
4
3
2
1
0
Access
Reset
Bits 9,11,12,13 – SR0Bx (x = 9, 11, 12, 13; x = 9
for bit9 mapped to PB9, … x = 13 for bit13 mapped to PB13) Slew Rate Control 0 for
PortB
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.