18.3.2 SENT1 Control Register 2
| Name: | SENT1CON2L |
| Offset: | 0x084 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SENT1CON2[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SENT1CON2[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:0 – SENT1CON2[15:0] SENT1 Control Register 2
The SENT1CON2L register is a 16-bit readable and writable register.
Transmit mode:
Stores the 16-bit value for TICKTIME[15:0], the period of the tick clock generator.
Receive mode:
Stores the 16-bit value for SYNCMAX[15:0], the maximum time interval for a valid Sync period.
