20.6.7 CCPx Control 3 High Register
| Name: | CCPxCON3H |
| Offset: | 0x95A, 0x97E, 0x9A2, 0x9C6 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| OETRIG | OSCNT[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| POLACE | PSSACE[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bit 15 – OETRIG CCPx Dead-Time Select bit
| Value | Description |
|---|---|
1 |
For Triggered mode (TRIGEN = |
0 |
Normal output pin operation. |
Bits 14:12 – OSCNT[2:0] One-Shot Event Count bits
| Value | Description |
|---|---|
111 |
Extends one-shot event by seven time base periods (eight time base periods total). |
110 |
Extends one-shot event by six time base periods (seven time base periods total). |
101 |
Extends one-shot event by five time base periods (six time base periods total). |
100 |
Extends one-shot event by four time base periods (five time base periods total). |
011 |
Extends one-shot event by three time base periods (four time base periods total). |
010 |
Extends one-shot event by two time base periods (three time base periods total). |
001 |
Extends one-shot event by one time base period (two time base periods total). |
000 |
Does not extend one-shot trigger event. |
Bit 5 – POLACE CCPx Output Pins, OCxA, OCxC and OCxE, Polarity Control bit
| Value | Description |
|---|---|
1 |
Output pin polarity is active-low. |
0 |
Output pin polarity is active-high. |
Bits 3:2 – PSSACE[1:0] PWMx Output Pins, OCxA, OCxC and OCxE, Shutdown State Control bits
| Value | Description |
|---|---|
11 |
Pins are driven active when a shutdown event occurs. |
10 |
Pins are driven inactive when a shutdown event occurs. |
0x |
Pins are in a High-Impedance state when a shutdown event occurs. |