17.5.5 I2C1 Client Mode Address Mask Register
| Name: | I2C1MSK |
| Offset: | 0x20C |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| MSK[9:8] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MSK[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 9:0 – MSK[9:0] I2C1 Mask for Address Bit x Select bits
| Value | Description |
|---|---|
1 |
Enables masking for bit x of the incoming message address; a bit match is not required in this position. |
0 |
Disables masking for bit x; a bit match is required in this position. |
