3.2.13 Force Execution Instruction Register 1

Name:	FEX
Offset:	0x0030


Bit	31	30	29	28	27	26	25	24
	FEX[31:24]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	FEX[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	FEX[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	FEX[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	1

Bits 31:0 – FEX[31:0] Force Execution Instruction bits

For two-word operations, FEX contains the first instruction to be executed using the UFEX instruction. FEX is only visible as a R/W register in Debug mode. In all other operating modes, it is read-only for all 0’s.