3.2.12 Captured PC Address at Time of Trap
Register
Note:
PCTRAP[0] always reads as
0.
If the current IPL is greater or equal to 8, the PC address will not be
captured.
Hardware update is blocked
after the first PCTRAP update occurs, preventing newer traps from
overwriting the source address of older ones. An update can be re-enabled by
the user attempting to write 24’h000000 to PCTRAP (the write will not occur,
preserving PCTRAP contents).
Name:
PCTRAP
Offset:
0x002C
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
PCTRAP[23:16]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
PCTRAP[15:8]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
PCTRAP[7:0]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bits 23:0 – PCTRAP[23:0]
Captured PC Address at Time of Trap Exception bits(1,2,3)
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
