8.2.9 Peripheral Access Control Register 2

Legend: R = Readable bit, W = Writable bit, S = One Way Settable bit
Name: PACCON2
Offset: 0x1E84

Bit 3130292827262524 
 WDTCONWRCM4RANGEWRCM4CONWRCM3RANGEWRCM3CONWRCM2RANGEWRCM2CONWRCM1RANGEWR 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 
Bit 2322212019181716 
 CM1CONWROSCCTRLWRNVMCONWRIOIM16CONWRIOIM15CONWRIOIM14CONWRIOIM13CONWRIOIM12CONWR 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 
Bit 15141312111098 
 WDTCONLKCM4RANGELKCM4CONLKCM3RANGELKCM3CONLKCM2RANGELKCM2CONLKCM1RANGELK 
Access S/RS/RS/RS/RS/RS/RS/RS/R 
Reset 00000000 
Bit 76543210 
 CM1CONLKOSCCTRLLKNVMCONLKIOIM16CONWRIOIM15CONWRIOIM14CONWRIOIM13CONWRIOIM12CONWR 
Access S/RS/RS/RR/WR/WR/WR/WR/W 
Reset 00011111 

Bit 31 – WDTCONWR Watchdog Timer Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 30 – CM4RANGEWR Clock Monitor 4 Range (CM4WINPR - CM4LWARN) Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 29 – CM4CONWR Clock Monitor 4 Control Register Write Enable bit

ValueDescription
1 Register is Writable.
0 Register is not Writable.

Bit 28 – CM3RANGEWR Clock Monitor 3 Range (CM3WINPR - CM3LWARN) Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 27 – CM3CONWR Clock Monitor 3 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 26 – CM2RANGEWR Clock Monitor 2 Range (CM2WINPR - CM2LWARN) Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 25 – CM2CONWR Clock Monitor 2 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 24 – CM1RANGEWR Clock Monitor 1 Range (CM1WINPR - CM1LWARN) Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 23 – CM1CONWR Clock Monitor 1 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 22 – OSCCTRLWR System Clock Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 21 – NVMCONWR Nonvolatile Memory (NVM) Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 20 – IOIM16CONWR IOIM 16 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 19 – IOIM15CONWR IOIM 15 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 18 – IOIM14CONWR IOIM 14 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 17 – IOIM13CONWR IOIM 13 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 16 – IOIM12CONWR IOIM 12 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 15 – WDTCONLK Watchdog Timer Control Register Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 14 – CM4RANGELK Clock Monitor 4 Range (CM4WINPR - CM4LWARN) Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 13 – CM4CONLK Clock Monitor 4 Control Register Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 12 – CM3RANGELK Clock Monitor 3 Range (CM3WINPR - CM3LWARN) Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 11 – CM3CONLK Clock Monitor 3 Control Register Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 10 – CM2RANGELK Clock Monitor 2 Range (CM2WINPR - CM2LWARN) Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 9 – CM2CONLK Clock Monitor 2 Control Register Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 8 – CM1RANGELK Clock Monitor 1 Range (CM1WINPR - CM1LWARN) Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 7 – CM1CONLK Clock Monitor 1 Control Register Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 6 – OSCCTRLLK Oscillator Control Register Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 5 – NVMCONLK NVM Control Register Lock bit

ValueDescription
1 Register is write locked.
0 Register is not write locked.

Bit 4 – IOIM16CONWR IOIM 16 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 3 – IOIM15CONWR IOIM 15 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 2 – IOIM14CONWR IOIM 14 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 1 – IOIM13CONWR IOIM 13 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.

Bit 0 – IOIM12CONWR IOIM 12 Control Register Write Enable bit

ValueDescription
1 Register is writable.
0 Register is not writable.