26.2.2 Output Enable Control

Each of the output pins controlled by the MCCP module may be enabled separately using the CCPxCON2.OCxEN control bits. If one of the OCxEN control bits is set, then that I/O pin receives the Output Compare signal that is generated by the module. The signal generated on the pin is a function of the Output Mode Control bits, OUTM[2:0]. If the OCxEN Control bit is cleared, then the I/O pin is controlled by the port logic or another peripheral of higher priority. The user must use care to ensure that the I/O pin will be in the correct state when a OCxEN Control bit is cleared.

Note: The CCPxCON2.OCAEN bit will reset to ‘1’ by default. This configures the CCP module to use the OCxA output pin for output compare functions by default, simplifying software configuration. The user may enable other pins in software as needed using the OCxEN control bits.

The OCxEN Control bits have no effect on a module operation when the module is operated in an Input Capture mode (CCM = 1) or a Timer mode (CCM = 0 and MOD[3:0] = 0000).

The OCxEN control bits can be used in different ways depending on the output mode selected by the OUTM[2:0] control bits. The OCxEN bits can provide a steering function to redirect the Output Compare signal to different pins at specific times. This steering functionality is useful in motor and power control applications.

The OCxEN bits can also be used to relocate the module output signals to different sets of output pins. For example the Half-Bridge Output mode replicates the same pair of signals on the OCxA/OCxB, OCxC/OCxD and OCxE/OCxF pins. The user can enable any of these pin pairs using the OCxEN bits to move the signals to a convenient location.