26.2.4 Push-Pull Output Mode

The Push-Pull PWM mode is selected when CCPxCON3.OUTM[2:0] = 001. In Push-Pull PWM mode, the output compare signal is multiplexed between the OCxA and OCxB output pins on alternate timebase cycles. For each time-base cycle, one of the pins is connected to the output compare signal and the other pin is driven to the Inactive state.

The output and port control signals for the OCxA/OCxB pin pair are replicated for the OCxC/OCxD and OCxE/OCxF output pins in this Push-Pull mode. This allows the user to move the push-pull output signals to another pin pair using the OCxEN control bits. The user must set at least one pair of OCxEN control bits to allow the module to control two output pins.

This mode is commonly used to drive transformers in DC/DC and DC/AC power supplies. As shown in Figure 26-2, each output pin drives one side of the transformer winding through an external power transistor. The transformer has a center winding that is connected to a DC bus voltage. The module must produce the same pulse-width for each side of the transformer to prevent DC current flow in the transformer winding. Therefore, the duty cycle must remain the same for two time-base periods. A four-transistor push-pull circuit may also be used as shown in Figure 26-3. Note that a second output pin pair has been used. In addition, the connections to the second pair of transistors have been intentionally swapped so that each pair of diagonal transistors is on at the same time.

Interrupts from the time base Reset events are automatically post-scaled 2:1 in Push-Pull PWM mode so that the user does not have to track the number of time-base periods that have elapsed.

Note: Push-Pull Output mode must be used with a buffered Output Compare mode. The output control logic inhibits buffer updates for the CCPxRA and CCPxRB registers on every other time-base cycle as shown in Figure 26-1. If a buffered Output Compare mode is not selected, the Push-Pull Output mode will be unable to maintain the same duty cycle across two time-base periods.

Note that in Figure 26-1, the module also produces output compare interrupt events in this mode. These events are a result of the time base comparison with the CCPxRA register, which produces the PWM falling edge. If the user requires more frequent interrupts, the output compare interrupt events may be monitored instead of the timer interrupt events.