26.2.5 Half-Bridge Output Mode

The Half-Bridge Output mode is selected when CCPxCON2.OUTM[2:0] = 010.

In this mode, two device output pins are controlled. The module produces complementary output signals on OCxA and OCxB. The OCxB signal is the inverse of the OCxA signal, and dead-time delay, if non-zero, is inserted between the switching events of the two pins. The output and port control signals for the OCxA/OCxB pin pair are replicated for the OCxC/OCxD and OCxE/OCxF output pins in this Half-Bridge mode. This allows the user to move the complementary output signals to another pin pair using the OCxEN control bits. The user must set at least one pair of OCxEN control bits to produce half-bridge output signals.

The Half-Bridge PWM mode is typically used to control power circuits like the one shown in Figure 26-4.

If a non-zero dead-time value is programmed into the CCPxCON3.DT[5:0] bits, then a delay is inserted between the switching edges of the OCxA and OCxB signals.