25.4.9.1 Period Match and Slow Clock

When using the prescaler, the user software can change the value of the period register faster than one timer period.

Figure 25-8 shows that when the counter is operating with an 8x prescale and PRx is written before the end of the prescaler rollover, a period match is not detected and an interrupt is not generated. In this case, the timer will continue running until a compare match occurs between TMRx and the new value M. If M is lower than the original period of N, the timer will run all the way to 0xFFFF_FFFF and roll over to 0x0000_0000.

Figure 25-6. Synchronous Clock with Prescale with Write to PRx Following Match (TxCON.TCS = 0, TxCON.TCKPS[1:0] =01)

Figure 25-7. Synchronized External Clock with 8:1 Prescale Timing Diagram

Figure 25-8. Synchronous Clock with Prescale with Write to PRx Following Match (TxCON.TCS = 0, TxCON.TCKPS[1:0] =01)