4.8.11.27 WCOTOA – Wake Check OK Time-out for Path A

This value defines the time before the get telegram state machine stops waiting for a WCO signal on path A. The state machine either stops itself or triggers a restart of path A depending on the DARA configuration in the GTCR register. The wait time is a piece-wise linear approximation of an exponential curve. The delay time in XTO/4 cycles can be calculated by the following formula:

d e l a y c y c l e s = (W C O T O A [3 : 0] \times 2 \div 32) \times (2^{W C O T O A [7 : 4]}) (45)

Name:	WCOTOA
Offset:	0x0FB
Reset:	0x00


Bit	7	6	5	4	3	2	1	0
	WCOTOA [7:4]				WCOTOA [3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:4 – WCOTOA [7:4] Wake Check OK Time-out for Path A

The following table provides details about the time-out delay example values.

Bits 3:0 – WCOTOA [3:0] Wake Check OK Time-out for Path A

A few example values are given in the following table.

Table 4-47. Time-out Delay Time Examples
WCOTOA[7:0]	Delay Time	Example Time at 26 MHz XTO Frequency
0	infinite	infinite
1	34 cycles	5.23 µs
2	36 cycles	5.54 µs
32	128 cycles	19.69 µs
33	136 cycles	20.92 µs
64	512 cycles	78.77 µs
128	8192 cycles	1.26 ms
192	131072 cycles	20.16 ms
255	2031616 cycles	312.56 ms