2.6.4 Memory Access Instructions

The following table provides memory access instructions:

Table 2-24. Memory Access Instructions
MnemonicBrief DescriptionSee
ADRGenerate PC-relative address2.6.4.1 ADR
CLREXClear Exclusive2.6.4.9 CLREX
LDM{mode}Load Multiple registers2.6.4.6 LDM and STM
LDR{type}Load Register using immediate offset2.6.4.2 LDR and STR, Immediate Offset
LDR{type}Load Register using register offset2.6.4.3 LDR and STR, Register Offset
LDR{type}TLoad Register with unprivileged access2.6.4.4 LDR and STR, Unprivileged
LDRLoad Register using PC-relative address2.6.4.5 LDR, PC-relative
LDREX{type}Load Register Exclusive2.6.4.8 LDREX and STREX
POPPop registers from stack2.6.4.7 PUSH and POP
PUSHPush registers onto stack2.6.4.7 PUSH and POP
STM{mode}Store Multiple registers2.6.4.6 LDM and STM
STR{type}Store Register using immediate offset2.6.4.2 LDR and STR, Immediate Offset
STR{type}Store Register using register offset2.6.4.3 LDR and STR, Register Offset
STR{type}TStore Register with unprivileged access2.6.4.4 LDR and STR, Unprivileged
STREX{type}Store Register Exclusive2.6.4.8 LDREX and STREX