2.6.2 CMSIS Functions
ISO/IEC C code cannot directly access some Cortex-M3 processor instructions. This section describes intrinsic functions that can generate these instructions, provided by the CMSIS and that might be provided by a C compiler. If a C compiler does not support an appropriate intrinsic function, you might have to use inline assembler to access some instructions.
The following table lists the intrinsic functions that the CMSIS provides to generate instructions that ISO/IEC C code cannot directly access.
Instruction | CMSIS function |
---|---|
CPSIE I | void __enable_irq(void) |
CPSID I | void __disable_irq(void) |
CPSIE F | void __enable_fault_irq(void) |
CPSID F | void __disable_fault_irq(void) |
ISB | void __ISB(void) |
DSB | void __DSB(void) |
DMB | void __DMB(void) |
REV | uint32_t __REV(uint32_t int value) |
REV16 | uint32_t __REV16(uint32_t int value) |
REVSH | uint32_t __REVSH(uint32_t int value) |
RBIT | uint32_t __RBIT(uint32_t int value) |
SEV | void __SEV(void) |
WFE | void __WFE(void) |
WFI | void __WFI(void) |
The following table lists the functions that CMSIS provides for accessing the special registers using MRS and MSR instructions.
Special Register | Access | CMSIS function |
---|---|---|
PRIMASK | Read | uint32_t __get_PRIMASK (void) |
Write | void __set_PRIMASK (uint32_t value) | |
FAULTMASK | Read | uint32_t __get_FAULTMASK (void) |
Write | void __set_FAULTMASK (uint32_t value) | |
BASEPRI | Read | uint32_t __get_BASEPRI (void) |
Write | void __set_BASEPRI (uint32_t value) | |
CONTROL | Read | uint32_t __get_CONTROL (void) |
Write | void __set_CONTROL (uint32_t value) | |
MSP | Read | uint32_t __get_MSP (void) |
Write | void __set_MSP (uint32_t TopOfMainStack) | |
PSP | Read | uint32_t __get_PSP (void) |
Write | void __set_PSP (uint32_t TopOfProcStack) |