16.4 COMM_BLK Configuration Registers
The COMM_BLK base address resides at 0x40016000 and extends to address 0x40016FFF in the Cortex-M3 processor memory map. The following table summarizes the control and status registers for the COMM_BLK.
| Register Name | Address Offset | R/W | Reset Value | Description |
|---|---|---|---|---|
| Table 16-3 | 0x00 | R/W | 0x00 | Control Register |
| Table 16-4 | 0x04 | R/W | 0x00 | Status Register |
| Table 16-5 | 0x08 | R/W | 0x00 | Interrupt Enable |
| Table 16-6 | 0x10 | R/W | 0x00 | Byte Data Register |
| Table 16-7 | 0x14 | R/W | 0x00000000 | Word Data Register |
| Table 16-8 | 0x18 | R/W | 0x00 | Frame/Command Byte Register |
| Table 16-9 | 0x1c | R/W | 0x00000000 | Frame/Command Word Register |