23.2.3 Configure MSS Master View for the FPGA Fabric Address

There are six 256 MB regions defined as FIC Regions 0 to 5 in the MSS memory map. Each of these regions can be allocated to the FIC_0 or FIC_1 slave interfaces in a mutually exclusive fashion. Libero SoC MSS configurator allows you to configure the Memory Regions for the FIC interfaces. By default, fabric regions 0, 1, and 2 are accessible through FIC_0, and regions 3, 4, and 5 are accessible through FIC_1. The following table lists the FIC memory regions.