23.2.3 Configure MSS Master View for the FPGA Fabric Address
There are six 256 MB regions defined as FIC Regions 0 to 5 in the MSS memory map. Each of these regions can be allocated to the FIC_0 or FIC_1 slave interfaces in a mutually exclusive fashion. Libero SoC MSS configurator allows you to configure the Memory Regions for the FIC interfaces. By default, fabric regions 0, 1, and 2 are accessible through FIC_0, and regions 3, 4, and 5 are accessible through FIC_1. The following table lists the FIC memory regions.
| FIC Region | Start Address | End Address |
|---|---|---|
| 0 | 0x30000000 | 0x3FFFFFFF |
| 1 | 0x50000000 | 0x5FFFFFFF |
| 2 | 0x70000000 | 0x7FFFFFFF |
| 3 | 0x80000000 | 0x8FFFFFFF |
| 4 | 0x90000000 | 0x9FFFFFFF |
| 5 | 0XF0000000 | 0xFFFFFFFF |