15.4.1.1 Register Map

The following table lists all the GPIO registers in the SYSREG block. The SYSREG block is located at address 0x40038000 in the Cortex-M3 processor address space.

Table 15-5. GPIO SYREG Registers
Register Name	Address Offset	Register Type	Flash Write Protect	Reset Source	Description
Table 15-7	0x18C	RO-P		SYSRESET_N	MSS GPIO definition register
Table 15-6	0x48	RW-P	Bit	SYSRESET_N	Generates software control interrupts to the MSS peripherals
Table 15-8	0x54	RW-P	Register	SYSRESET_N	Loopback control for MSS peripherals
Table 15-10	0x58	RW-P	Register	PORESET_N	Configures GPIO system reset.
Table 15-9	0x5C	RW-P	Register	PORESET_N	Used to generate a GPIO input signal