Automatic Restart Enable
The PWMRSEN bit (CCPxCON2[15]) controls how the shutdown state is ended. If PWMRSEN =
0
, the module will wait until the ASEVT status bit is cleared in
user software. Normal output pin activity can only be resumed when the ASEVT bit is
cleared AND the external shutdown source signal is no longer present. If the external
shutdown source signal is still active, the user cannot clear the ASEVT bit.
If PWMRSEN = 1
, normal output pin activity will automatically resume
when the external shutdown source signal is inactive and the next PWM period begins
(i.e., when the Sync source selected by SYNC[4:0] is asserted). The ASEVT bit will
automatically be cleared in hardware at this time. If the shutdown is still in effect at
the time a new cycle begins, that entire cycle is suppressed, thus eliminating narrow,
glitch pulses. The PWM outputs are then restarted on the next cycle.
If PWMRSEN = 0
, once a shutdown condition occurs, the PWM remains Idle
until manually restarted by the user. The module can be restarted by clearing the ASEVT
bit in software.
- Any device-defined hardware shutdown event when the corresponding ASDG bit is set or when the SSDG bit is set.