10.4.3.2 Axcelerator FIFO I/O Description
The following table lists the I/O ports of the Accelerator FIFO.
| Name | Type | Required/Optional | Description |
|---|---|---|---|
| Data | IN | Required | Data Port |
| WE | IN | Optional | Write Enable |
| WClock | IN | Required | Write Clock |
| Q | OUT | Required | Q Port |
| RE | IN | Optional | Read Enable |
| RClock | IN | Required | Read Clock |
| Full | OUT | Required | Full Flag |
| Empty | OUT | Required | Empty Flag |
| Afval | IN | Optional | Almost Full, Dynamically programmable |
| Aeval | IN | Optional | Almost Empty, Dynamically programmable |
| AFull | OUT | Optional | Almost Full Flag |
| AEmpty | OUT | Optional | Almost Empty Flag |