31.6.20 Flash ECC Fault Control REGISTER
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | FFLTCTRL |
| Offset: | 0x4c |
| Reset: | 0x00000000 |
| Property: | R/W |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FLTEN | FLTRST | ||||||||
| Access | R/W | R/S/HC | |||||||
| Reset | 0 | 0 |
Bit 1 – FLTEN When FLTEN = 1, any write to a FFLT registers labeled as Enable-Protected is discarded and an error is generated.
| Value | Name | Description |
|---|---|---|
| 1 | ENABLE | ECC Fault Injection Enabled (module performs operation selected by FFLTMODE.FLTMD) |
| 0 | DISABLE | ECC Fault Injection Disabled |
Bit 0 – FLTRST Fault Reset
| Value | Name | Description |
|---|---|---|
| 1 | RESET | Resets all FLT SFR bits. |
| 0 | NONE | No Action |