31.6.6 Interrupt Flag Set REGISTER

Table 31-37. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Bit 16 – FLTCAP Read value reflects state of INTFLAG. Write value:

Reading this bit returns the INTFLAG bit value.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit will set the interrupt pending.

Value	Name	Description
1		Set Interrupt Pending
0		No effect

Reading this bit returns the INTFLAG bit value.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit will set the interrupt pending.

Value	Name	Description
1		Set Interrupt Pending
0		No effect

Reading this bit returns the INTFLAG bit value.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit will set the interrupt pending.

Value	Name	Description
1		Set Interrupt Pending
0		No effect

Reading this bit returns the INTFLAG bit value.

Writing a '0' to this disables the pending interrupt.

Writing a '1' to this bit will set the interrupt pending, as if SECCNT count is reached.

Value	Name	Description
1		SECCNT Count reached
0		No Interrupt Pending