45.8.10
Table 45-11. Register Bit Attribute Legend| Symbol | Description | Symbol | Description | Symbol | Description |
|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | CryptoMaster_DMA_Registers__PUSH_LEN |
| Offset: | 0x10018 |
| Reset: | 0x00000000 |
| Property: | RW |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | | PUSH_DISCARD | PUSH_REALIGN | PUSH_CSTADDR | PUSH_LEN[27:24] | |
| Access | | RW | RW | RW | RW | RW | RW | RW | |
| Reset | | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| | PUSH_LEN[23:16] | |
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| | PUSH_LEN[15:8] | |
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | PUSH_LEN[7:0] | |
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 30 – PUSH_DISCARD Discard data
(pusher only)
In direct mode,
this register is written by the software. In scatter-gather mode, this register is not
used.
Bit 29 – PUSH_REALIGN Realign
length
In direct mode,
this register is written by the software. In scatter-gather mode, this register is not
used.
Bit 28 – PUSH_CSTADDR Constant
address
In direct mode,
this register is written by the software. In scatter-gather mode, this register is not
used.
Bits 27:0 – PUSH_LEN[27:0] Length of data
block
In direct mode,
this register is written by the software. In scatter-gather mode, this register is not
used.
