2.2.4.1.7 Routing Net Dynamic Contribution—P_NET

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SoC Mode

P_NET = (N_S-CELL + N_C-CELL) × (⍺₁/2) × P_AC8 × F_CLK

N_S-CELL is the number VersaTiles used as sequential modules in the design.

N_C-CELL is the number of VersaTiles used as combinatorial modules in the design.

⍺₁ is the toggle rate of VersaTile outputs—guidelines are provided in Table 2-17.

F_CLK is the frequency of the clock driving the logic including these nets.

Standby Mode and Time Keeping Mode

P_NET = 0W

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2.2.4.1.7 Routing Net Dynamic Contribution—PNET

2.2.4.1.7 Routing Net Dynamic Contribution—P_NET