13.3.14 DMA Channel x Mask Register

Name:	DMAxMSK
Offset:	0x2334, 0x2360, 0x238C, 0x23B8, 0x23E4, 0x2410, 0x243C, 0x2468


Bit	31	30	29	28	27	26	25	24
	MSK[31:24]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	MSK[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	MSK[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	MSK[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:0 – MSK[31:0] Mask Register bits

When set high, only the corresponding data bit(s) from the DMABUF and DMAPATn registers are compared in the pattern match operation.

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