20.3.8 UART Checksum Result Register

Name: UxCHK
Offset: 0x171C, 0x175C, 0x179C

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
 RXCHK[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 TXCHK[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 23:16 – RXCHK[7:0] Receive Checksum bits (calculated from RX words)

LIN Modes:

C0EN = 1: Sum of all received data + addition carries, including PID.

C0EN = 0: Sum of all received data + addition carries, excluding PID.

LIN Responder:

Cleared when Break is detected.

LIN Commander/Responder:

Cleared when Break is detected.

Other Modes:

C0EN = 1: Sum of every byte received + addition carries

C0EN = 0: Value remains unchanged.

Bits 7:0 – TXCHK[7:0] Transmit Checksum bits (calculated from TX words)

LIN Modes:

C0EN = 1: Sum of all transmitted data + addition carries, including PID

C0EN = 0: Sum of all transmitted data + addition carries, excluding PID

LIN Responder:

Cleared when Break is detected.

LIN Commander/Responder:

Cleared when Break is detected.

Other Modes:

C0EN = 1: Sum of every byte transmitted + addition carries

C0EN = 0: Value remains unchanged.