20.3.10 UARTx Interrupt Register

Note:

  1. After the occurrence of the WAKE event, the WUIF flag can only be cleared once the wake (WUE) bit is cleared by hardware following the rising edge.

Legend: HS = Hardware Settable bit

Name: UxUIR
Offset: 0x1724, 0x1764, 0x17A4

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 WUIFABDIF   ABDIE   
Access R/W/HSR/W/HSR/W 
Reset 000 

Bit 7 – WUIF  Wake-up Interrupt Flag bit(1)

ValueDescription
1

Sets when WUE = 1 and RX makes a 1-to-0 transition; triggers event interrupt (must be cleared by software).
0

WUE is not enabled or WUE is enabled, but no wake-up event has occurred.

Bit 6 – ABDIF Auto-Baud Completed Interrupt Flag bit

ValueDescription
1

Sets when ABD sequence makes the final 1-to-0 transition; triggers event interrupt (must be cleared by software).
0

ABDEN is not enabled or ABDEN is enabled but auto-baud has not completed.

Bit 2 – ABDIE Auto-Baud Completed Interrupt Enable Flag bit

ValueDescription
1

Allows ABDIF to set an event interrupt.
0

ABDIF does not set an event interrupt.