3.6.8.1.1 FPU Register Access

Data may be moved in and out of any FPU register, from OR to W-regs or DS memory, by using dedicated coprocessor register move instructions that execute from within the integer pipeline (refer to MOVCRW, MOVWCR, MOVLCR, LDWLOCR, STWLOCR, PUSHCR and POPCR CPU instructions as described in FPU Module Operation).

All data are moved as 32-bit entities, so double precision data moves will require the execution of two instructions (64-bit data moves are not supported in this device).

In addition, the FPU supports FAND and FIOR instructions that can logically AND or OR a literal value with the FSR (lsw only, exception status), FCR or FEAR (lsw only).