18.3.4 DACx Control Low Register

Note:

CMP6 is tied to AV_SS.

Name:	DACxCMP
Offset:	0x1D4C, 0x1D60, 0x1D74, 0x1D88, 0x1D9C, 0x1DB0, 0x1DC4, 0x1DD8


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
						HYSPOL	HYSSEL[1:0]
Access						R/W	R/W	R/W
Reset						0	0	0


Bit	15	14	13	12	11	10	9	8
						CBE		FLTREN
Access						R/W		R/W
Reset						0		0


Bit	7	6	5	4	3	2	1	0
	CMPSTAT	CMPPOL	INPSEL[2:0]			INNSEL[2:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bit 18 – HYSPOL Comparator Hysteresis Polarity Select bit

Value	Description
1	Hysteresis is applied to the falling edge of the comparator input.
0	Hysteresis is applied to the rising edge of the comparator input.

Bits 17:16 – HYSSEL[1:0] Comparator Hysteresis Select bits

Value	Description
11	45 mv hysteresis
10	30 mv hysteresis
01	15 mv hysteresis
00	No hysteresis is selected

Bit 10 – CBE Comparator Blank Enable bit

Value	Description
1	Enables the analog comparator output to be blanked (gated off) during the recovery transition following the completion of a slope operation.
0	Disables the blanking signal to the analog comparator; therefore, the analog comparator output is always active.

Bit 8 – FLTREN Comparator Digital Filter Enable bit

Value	Description
1	Digital filter is enabled.
0	Digital filter is disabled.

Bit 7 – CMPSTAT Comparator Status bit

Current state of comparator output, including CMPPOL selection

Bit 6 – CMPPOL Comparator Output Polarity Control bit

Value	Description
1	Output is inverted.
0	Output is non-inverted.

Bits 5:3 – INPSEL[2:0] Comparator Positive Input Source Select bits

Value	Description
0101	ALLCMP
0100	Bandgap 0.8V
0011	CMPxD⁽¹⁾
0010	CMPxC
0001	CMPxB
0000	CMPxA

Bits 2:0 – INNSEL[2:0] Comparator Negative Input Source Select bits

Value	Description
0101	CMPFN
0100	CMPEN
0011	CMPDN
0010	CMPCN
0001	AV_SS
0000	DACx

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