14.9.1 XDMAC Global Type Register

Reset: The register reset values depend on the instance of the XDMAC:

Instance Reset Value
XDMAC0, XDMAC1 0x004A201F
XDMAC2 0x00002007
Name: XDMAC_GTYPE
Offset: 0x00
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
  NB_REQ[6:0] 
Access RRRRRRR 
Reset  
Bit 15141312111098 
 FIFO_SZ[10:3] 
Access RRRRRRRR 
Reset  
Bit 76543210 
 FIFO_SZ[2:0]NB_CH[4:0] 
Access RRRRRRRR 
Reset  

Bits 22:16 – NB_REQ[6:0] Number of Peripheral Requests Minus One

Bits 15:5 – FIFO_SZ[10:0] Number of Bytes

The FIFO size is given by the formula: Number of bytes + 8.

Bits 4:0 – NB_CH[4:0] Number of Channels Minus One