2.6.5.3.1 Syntax
op{S}{cond} Rd, Rm, Rs
op{S}{cond} Rd, Rm, #n
RRX{S}{cond} Rd, Rm
where:
op
is one of:ASR
: Arithmetic Shift Right.LSL
: Logical Shift Left.LSR
: Logical Shift Right.ROR
: Rotate Right.
S
is an optional suffix. If S is specified, the condition code flags are updated on the result of the operation, see 2.6.3.7 Conditional Execution.Rd
is the destination register.Rm
is the register holding the value to be shifted.Rs
is the register holding the shift length to apply to the value in Rm. Only the least significant byte is used and can be in the range 0 to 255.- n is the shift length. The range of shift length depends on the instruction:
ASR
shift length from 1 to 32LSL
shift length from 0 to 31LSR
shift length from 1 to 32ROR
shift length from 1 to 31Important:MOVS Rd, Rm
is the preferred syntax forLSLS Rd, Rm, #0
.