2.6.5.3.1 Syntax
op{S}{cond} Rd, Rm, Rs
op{S}{cond} Rd, Rm, #n
RRX{S}{cond} Rd, Rm
where:
opis one of:ASR: Arithmetic Shift Right.LSL: Logical Shift Left.LSR: Logical Shift Right.ROR: Rotate Right.
Sis an optional suffix. If S is specified, the condition code flags are updated on the result of the operation, see Conditional Execution.Rdis the destination register.Rmis the register holding the value to be shifted.Rsis the register holding the shift length to apply to the value in Rm. Only the least significant byte is used and can be in the range 0 to 255.- n is the shift length. The range of shift length depends on the instruction:
ASRshift length from 1 to 32LSLshift length from 0 to 31LSRshift length from 1 to 32RORshift length from 1 to 31Important:MOVS Rd, Rmis the preferred syntax forLSLS Rd, Rm, #0.
