23.7.1 FIC Configuration

The FIC_0 and FIC_1 are not configured by default in the MSS configurator, when the Libero SoC project is created. To configure/create a FIC subsystem:

1. The MSS FIC has to be configured to expose the FIC interface.
2. The FPGA fabric FIC subsystem has to be created including instantiation / configuration / connectivity for:
   • APB or AHB-Lite bus.
   • APB and AHB-Lite compliant master and/or peripherals configuration and connection onto the bus, as required by your application.
   • Clocks and resets; refer to 23.7.2 Configuring the FIC Subsystem Clocks and 23.7.3 Configuring the FIC Subsystem Reset.

These steps are described in detail below. FIC, Clocks, and Reset sub-blocks are outlined in red in Figure 23-3.