23.7.4 Use Models

The FIC allows four possible communication scenarios that are described in the following sections.

Microchip provides numerous AHB and APB v 3.0 compliant cores in the Libero SoC IP catalog for easy instantiation into the FPGA fabric. You must instantiate CoreAHBLite and CoreAPB3 soft IP into the fabric to allow further instantiation of soft AHB-Lite and APB masters and slaves.

Important: The MSS Fabric Interface Controllers support full behavioral simulation models. Refer to SmartFusion2 MSS BFM Simulation User Guide for information.