3.2.2.1 eNVM Mapping
The cache matrix decodes the code region addresses by any master accessing a targeted slave. By default, the eNVM slave is mapped to the cache.
The following table shows the default memory map of the MSS digital subsystem - eNVM Remapped mode.
Data/Code Region | Space | Address |
---|---|---|
CM3 Data Region | Reserved | 0xE000_0000 to 0xFFFF_FFFF |
DDR _SPACE 3 (256 MB) | 0xD000_0000 to 0xDFFF_FFFF | |
DDR _SPACE 2 (256 MB) | 0xC000_0000 to 0xCFFF_FFFF | |
DDR_ SPACE 1 (256 MB) | 0xB000_0000 to 0xBFFF_FFFF | |
DDR _SPACE 0 (256 MB) | 0xA000_0000 to 0xAFFF_FFFF | |
eNVM, Remap Area etc (1 GB) | 0x6000_0000 to 0x9FFF_FFFF | |
Peripheral [SPI, UART, CAN, Fabric etc.] (0.5 GB) | 0x4000_0000 to 0x5FFF_FFFF | |
Reserved | 0x2001_0000 to 0x3FFF_FFFF | |
eSRAM-1 (32 KB) | 0x2000_8000 to 0x2000_FFFF | |
eSRAM-0 (32 KB) | 0x2000_0000 to 0x2000_7FFF | |
CM3 Code Region | Reserved | 0x0008_0000 to 0x1FFF_FFFF |
eNVM (Virtual View) [512 KB] | 0x0000_0000 to 0x0007_FFFF |
The address range of the eNVM_0 is from 0x60000000 to 0x6003FFFF and the address range of eNVM_1 is from 0x60040000 to 0x6007FFFF. The full eNVM (0x60000000 to 0x6007FFFF) is accessible (read/write) in the system space (0x00000000 to 0x0007FFFF). The eNVM AHB controller maps a specified segment of eNVM to this range. This allows multiple firmware images to be stored in eNVM.