2.1.16.2 ACM Bus Part of Init/CFG Interface

When this option is selected, you must provide external multiplexing between the INIT/CFG interface and user logic for access to the Analog Configuration multiplexer (ACM) bus.

The INIT_DONE signal from the Flash Memory System indicates when the INIT/CFG operation has completed and can be used to control the multiplexer selection between initialization access and user access.

The ports related to this interface are listed in the following table.

Table 2-12. ACM Bus INIT/CFG Interface Signals
Port Name	Direction	Description
ACMSCLK	Input	Clock input for the ACM interface. The maximum supported frequency is 10 MHz. This clock must operate at the same frequency used during initialization by the Flash Memory System.
ACMRDATA_I[7:0]	Output	Data read from the ACM.
INIT_ADDR[7:0]	Input	Shared ACM address bus used by the Flash Memory System initialization interface. This port is always exposed. You must multiplex the ACM address and the initialization address onto this bus. The multiplexer selection can be controlled using INIT_DONE.
INIT_DATA[7:0]	Input	Shared ACM write‑data bus used by the Flash Memory System initialization interface. This port is always exposed. You must multiplex the ACM write data and the initialization data onto this bus. The multiplexer selection can be controlled using INIT_DONE.
INIT_ACM_WEN	Input	Shared ACM write‑enable signal used by the Flash Memory System initialization interface. This port is always exposed. You must multiplex the ACM write‑enable signal and the initialization write‑enable signal onto this port. The multiplexer selection can be controlled using INIT_DONE.