17.5.17 UARTx Interrupt Register
Legend: HS = Hardware Settable bit
| Name: | UxINT |
| Offset: | 0x25C, 0x284, 0xF24 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WUIF | ABDIF | ABDIE | |||||||
| Access | R/W/HS | R/W/HS | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bit 7 – WUIF Wake-up Interrupt Flag bit
| Value | Description |
|---|---|
1 |
Sets when WAKE = |
0 |
WAKE is not enabled or WAKE is enabled, but no wake-up event has occurred |
Bit 6 – ABDIF Auto-Baud Completed Interrupt Flag bit
| Value | Description |
|---|---|
1 |
Sets when ABD sequence makes the final |
0 |
ABAUD is not enabled or ABAUD is enabled but auto-baud has not completed |
Bit 2 – ABDIE Auto-Baud Completed Interrupt Enable Flag bit
| Value | Description |
|---|---|
1 |
Allows ABDIF to set an event interrupt |
0 |
ABDIF does not set an event interrupt |
